As power semiconductor devices have evolved and on-resistance has decreased, the contribution of the substrate layer in a semiconductor die to the total resistance has grown. One way to further reduce the on-resistance in a power semiconductor device is to use a thinner semiconductor die. Also, thin semiconductor dies dissipate heat better than thicker semiconductor dies.
U.S. patent application Ser. No. 11/189,163, filed on Jul. 25, 2005, entitled “Semiconductor Structures Formed On Substrates And Methods of Manufacturing The Same”, by Qi Wang, et al. describes a method for producing a thin semiconductor die. The described method includes transferring a thin doped substrate layer to a handle wafer with an oxide interposer layer. The thin substrate layer (1-3 microns) can be processed by standard methods, including epi (epitaxial) deposition. The handle wafer is eventually replaced by a thick metal substrate to eliminate the normal semiconductor substrate contribution to the on-state resistance of formed devices. The resulting structure can then be segmented into chips that can be incorporated into conventional semiconductor die packages.
Embodiments of the invention provide for semiconductor die packages that are particularly suitable for use with the above-described semiconductor dies. However, embodiments of the invention need not be exclusively used with the above-described semiconductor dies. As will be described in further detail below, the semiconductor die packages according to embodiments of the invention can provide for lower on-resistance and better heat dissipation properties than conventional semiconductor die packages.
Embodiments of the invention address the above problems, and other problems, individually and collectively.